Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers | Semantic Scholar
PowerVR Series3NX is a powerful follow up to our successful Series2NX
VeriSilicon's Neural Network Processor IP Embedded in Over 100 AI Chips | Business Wire
![VLSI 2018] A 4M Synapses integrated Analog ReRAM based 66.5 TOPS/W Neural- Network Processor with Cell Current Controlled Writing and Flexible Network Architecture](https://t1.daumcdn.net/cfile/tistory/993DBA3E5BAF92CE38 "VLSI 2018] A 4M Synapses integrated Analog ReRAM based 66.5 TOPS/W Neural- Network Processor with Cell Current Controlled Writing and Flexible Network Architecture")
VLSI 2018] A 4M Synapses integrated Analog ReRAM based 66.5 TOPS/W Neural- Network Processor with Cell Current Controlled Writing and Flexible Network Architecture
Are Tera Operations Per Second (TOPS) Just hype? Or Dark AI Silicon in Disguise? - KDnuggets
![PDF] A 3.43TOPS/W 48.9pJ/pixel 50.1nJ/classification 512 analog neuron sparse coding neural network with on-chip learning and classification in 40nm CMOS | Semantic Scholar](https://d3i71xaburhd42.cloudfront.net/a2e283532b71e9b6af7addb3b3f4f4a1af6e0fb4/2-Figure1-1.png "PDF] A 3.43TOPS/W 48.9pJ/pixel 50.1nJ/classification 512 analog neuron sparse coding neural network with on-chip learning and classification in 40nm CMOS | Semantic Scholar")
PDF] A 3.43TOPS/W 48.9pJ/pixel 50.1nJ/classification 512 analog neuron sparse coding neural network with on-chip learning and classification in 40nm CMOS | Semantic Scholar
A 617-TOPS/W All-Digital Binary Neural Network Accelerator in 10-nm FinFET CMOS | Semantic Scholar
EdgeCortix Announces Sakura AI Co-Processor
TOPS, Memory, Throughput And Inference Efficiency
When “TOPS” are Misleading. Neural accelerators are often… | by Jan Werth | Towards Data Science
TOPS, Memory, Throughput And Inference Efficiency
As AI chips improve, is TOPS the best way to measure their power? | VentureBeat
書籍：Efficient Processing of Deep Neural Networks - Vengineerの戯言
Summary of benchmarks. GOPS for each neural network is estimated under... | Download Table
NeuPro | CEVA
Not all TOPs are created equal. Deep Learning processor companies often… | by Forrest Iandola | Analytics Vidhya | Medium
11 TOPS photonic convolutional accelerator for optical neural networks | Nature
Khadas on Twitter: "We made a mistake quoting the #VIM3 NPU performance. It is actually 5.0 TOPS! #khadas #amlogic #a311d #npu https://t.co/UEu0Iafo3E" / Twitter
One More Time: TOPS Do Not Predict Inference Throughput
Sticker: A 0.41-62.1 TOPS/W 8Bit Neural Network Processor with Multi-Sparsity Compatible Convolution Arrays and Online Tuning Acceleration for Fully Connected Layers | Semantic Scholar
Rockchip RK3399Pro SoC Integrates a 2.4 TOPS Neural Network Processing Unit for Artificial Intelligence Applications - CNX Software
Imagination Announces First PowerVR Series2NX Neural Network Accelerator Cores: AX2185 and AX2145
A 0.11 pJ/Op, 0.32-128 TOPS, Scalable Multi-Chip-Module-based Deep Neural Network Accelerator Designed with a High-Productivity VLSI Methodology | Research
TOPS, Memory, Throughput And Inference Efficiency
Nuit Blanche: A 2.9 TOPS/W Deep Convolutional Neural Network SoC in FD-SOI 28nm for Intelligent Embedded Systems (and a Highly Technical Reference page on Neural Networks in silicon.)
